2.1c.2 Shifting Operations

RISC-V Bitwise Shifting

The following are the RISC-V shifting operations. All operations follow the form operand rd rs1 rs2. They also have immediate equivalents that follow the format operand rd rs1 imm:

| Operation | Description |
| :-------: | :--------------------------------------------------------------------------------------------------------------: |
| sll(i) | Shifts the value of rs1 by rs2/imm bits to the left and stores the result in rd. |
| srl(i) | Shifts the value of rs1 by rs2/imm bits to the right and stores the result in rd. |
| sra(i) | Shifts the value of rs1 by rs2/imm bits to the right, preserves the MSB and stores the result in rd. |

Important! left logically will append zeros to the beginning (least significant bit) of the binary string. Shifting right logically will append zeros the the end (most significant bit). Shifting right arithmetically will append ones to the end (most significant part) of a negative binary string and will append zeros to the most significant bit of a positive binary string.

Shifting

Understanding

What is the difference between srl and sra?

• The first “logically” shifts the bits, meaning it only shifts them without further action. It is best used for division of unsigned integers.
• The latter “arithmetically” shifts the bits, thus preserving the most significant bit and therefore the sign of the number. It is best used for signed bits.

You can use the aforementioned operations for division of unsigned and signed integers by a power of two. As for sll, you can use it for multiplication by powers of two. Test it yourself!