2.5a DAGs

Delay-Adder-Gain Block Diagram

A delay-adder-gain block diagram is a graphical representation used to illustrate discrete-time systems that involve signal delays, summation (addition), or scaling by a gain factor. DAG structures take the input $x(n)$ and output $y(n)$ of a system, and represent the system’s manipulation of the input to obtain the output using

• Delay blocks ($\boxed{D}$), which delay any signal $g(n)$ by 1 unit of time, such that $g(n)\to \boxed{D}\to g(n-1)$.
• Adder blocks ($\oplus$), which sum two or more signals $f(n)$ and $g(n)$ to produce $f(n)+g(n)$.
• Gain blocks (${⊳}^{\alpha }$), which scale a signal by an integer $\alpha$.

Examples

Example