RISC-V Structural Hazards
In the RISC-V datapath, structural hazards occur when two or more instructions need to access a single shared physical resource, such as IMEM and DMEM, at the same time. In RISC-V, structural hazards in the RegFile are accounted for by the implementation of different ports for reading and writing (i.e. there are no structural hazards).
Generally, structural hazards in the datapath are solved by adding more hardware, accounting for hazards in the ISA (instruction set architecture), or use additional cycles per instruction to allow instructions to take more time.